PM Modi inaugurated SEMICON India 2026 at Yashobhoomi in New Delhi, the fifth edition of the event, bringing together more than 600 companies from 52 countries under the theme ‘Silicon to Systems: Building the Ecosystem.’

The headline numbers are the ones that make news: 600-plus exhibitors, 52 countries, a $200 billion market target, and a fresh ₹800 crore investment commitment from Japan’s Fujifilm announced at a CEO roundtable ahead of the launch.

But the detail worth paying more attention to is quieter: around 400 academic institutions and 105 startups are being given access to electronic design automation (EDA) tools, the specialized software used to actually design chips.

That matters because a semiconductor ecosystem isn’t built by manufacturing capacity alone — it needs a pipeline of people who know how to design chips in the first place, and EDA tools have historically been expensive enough to keep that skill concentrated in a handful of large companies and well-funded institutions.

Widening access to that tooling is a slower, less photogenic bet than a factory ribbon-cutting, but it’s the kind of infrastructure decision that determines whether a semiconductor push produces a lasting design talent base or just a set of assembly plants dependent on outside expertise.

The government has also approved a Semicon 2.0 phase of the programme, structured around six pillars aimed at deepening India’s semiconductor ecosystem.

Ahead of the inauguration, PM Modi chaired a roundtable with global semiconductor CEOs, emphasizing close collaboration between government and industry on skilling, innovation and emerging technologies such as AI and quantum computing.

Japanese company Fujifilm announced an investment of ₹800 crore for a new greenfield semiconductor materials manufacturing facility in India, following its CEO’s attendance at the PM’s roundtable.

The government has set a broader target of building India’s semiconductor market into a $200 billion industry as part of its long-term electronics manufacturing strategy.

Semiconductor wafer on dicing tape (representative image), Wikimedia Commons, CC BY-SA 4.0